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whitebird · 15 July 2011, 14:17

It's interesting to see that some HD conversions uses only a PAL/GAL chip (like the Amtrade) and others uses more complex components (Actel A1010 FPGA) like the one from Power Computing XL Drive shown on this page:

http://eab.abime.net/showthread.php?t=43265&page=2

Generally you will not be able to fit more than 2 or 3 74LSXXXX chips in a PAL/GAL, but with the future of being able to electrically erase and reprogram the chip while in the design.

So converters built with GAL chips must work on a very simple basis.

It is written here:

http://www.amiga-resistance.info/bbo...280&artlang=de

that the SONY drive doesn't require any modification (no rewiring of the /DCD from 34 to 2).

In fact it's not completely true because redirection of /DCD from pin 34 to 2 is actually done, not by the GAL chip (because it's only a matter of passive rewiring) but directly by the PCB.

We can clearly see PIN 34 of drive going to pin 2 of amiga connector:

http://www.amiga-resistance.info/dow...d357_1_big.jpg

Then by following the tracks, /RDY signals certainly is generated by the GAL chip which also generates:

/INDEX: This signal is a short pulse generated once per disk revolution.
We can also see that the /RDY signal is fully generated by the interface.

Let's suppose the GAL chip works like a divider and halves the /INDEX frequency so that amiga sees only 150RPM but data will still be emitted at 500Kbps and that's not acceptable for the amiga. So there should be something else...

It's a pity we cannot see all the tracks, but with a bit of work, I think it would near be possible to reverse engineer the interface...

15 July 2011, 14:17	#87
whitebird Registered User Join Date: May 2006 Location: France Age: 48 Posts: 211	It's interesting to see that some HD conversions uses only a PAL/GAL chip (like the Amtrade) and others uses more complex components (Actel A1010 FPGA) like the one from Power Computing XL Drive shown on this page: http://eab.abime.net/showthread.php?t=43265&page=2 Generally you will not be able to fit more than 2 or 3 74LSXXXX chips in a PAL/GAL, but with the future of being able to electrically erase and reprogram the chip while in the design. So converters built with GAL chips must work on a very simple basis. It is written here: http://www.amiga-resistance.info/bbo...280&artlang=de that the SONY drive doesn't require any modification (no rewiring of the /DCD from 34 to 2). In fact it's not completely true because redirection of /DCD from pin 34 to 2 is actually done, not by the GAL chip (because it's only a matter of passive rewiring) but directly by the PCB. We can clearly see PIN 34 of drive going to pin 2 of amiga connector: http://www.amiga-resistance.info/dow...d357_1_big.jpg Then by following the tracks, /RDY signals certainly is generated by the GAL chip which also generates: /INDEX: This signal is a short pulse generated once per disk revolution. We can also see that the /RDY signal is fully generated by the interface. Let's suppose the GAL chip works like a divider and halves the /INDEX frequency so that amiga sees only 150RPM but data will still be emitted at 500Kbps and that's not acceptable for the amiga. So there should be something else... It's a pity we cannot see all the tracks, but with a bit of work, I think it would near be possible to reverse engineer the interface...