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Originally Posted by Kai
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Kai, no sense to search for this particular device - probably any TAG SRAM from PC can be used - probably there is some change in code required but anyway PAL's should be replaced by one CPLD, also probably some memory (32 bit, modern SDRAM or at least FPM/EDO) should be added so in total CPU + CACHE + MEMORY.
Probably large part of Amiga memory map must have cache excluded thus i would rather focus on very fast normal memory - today perhaps even single cycle up to 50MHz (assuming 100 - 133MHz clock +2.5 cycle latency from average SDRAM).
Also TI offer BCT version for such TAG SRAM.