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Old 15 June 2013, 11:32   #85
Toni Wilen
WinUAE developer
Join Date: Aug 2001
Location: Hämeenlinna/Finland
Age: 44
Posts: 23,281
Exactly, it was really cheap and simple to implement.

Fat Agnus, even the original 512k chip version, have 1M (or was it 2M?) external addressing capability. Internal DMA address counters are still limited to 512k (256k words). This limits chip RAM size.

Because Agnus have extra external address lines, upper 512k bank can be easily mapped to somewhere else just be rerouting Agnus' upper address pin. "Slow RAM" was born.

This design decision also made 1M Agnus pin compatible with old version (*). Which was really nice decision (I am sure 1M chip ram was planned long time ago but they didn't have resources to upgrade all Agnus internals until much later), upgrade Agnus, reroute upper address pin again and you have 1M chip RAM.

*) Technically it wasn't 100% pin compatible but it had nothing to do with chip ram addressing, they replaced TEST pin with PAL/NTSC selection pin.
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