Quote:
Originally Posted by Toni Wilen
Second time today I post this link: http://amigadev.elowar.com/read/ADCD.../node0161.html 
Quick explanation: 68030 data cache always caches long aligned writes, even if destination address is supposed to be uncacheable. Following read(s) from same address come from cache, not from memory that may have been modified by some DMA device.
AFAIK this can be only fixed by using MMU to mark required memory regions as uncacheable. (if CPU is non-EC) |
Thanks for the interesting link, Toni. Your quick answer is not correct (with respect to my question). Indeed, uncorrect has been my memory. If you read carefully the doc you linked, you'll find out that it is the opposite: write-allocate is required for the Amiga to work correctly. It is also written in the C= include file where the cache macros are defined.
I have found several threads in the natami forum where they speak about this but it's not clear if and why it is *required* that Write-Allocate mode is turned on.
More in detail, Thomas Ritcher gives a partial answer:
"Ehem. No. It only works with write allocation enabled. Turning write allocation *off* is even more of a problem. We had a thread on this - reason for this is that the cache is logically indexed, not physically indexed, and that the function codes are part of the cache index. IOW, turning write allocation *off* breaks even more things."
since Thomas sometimes writes here too, I wonder if he can explain things in more detail.