Quote:
Originally Posted by whiteb
Awesome, thats good that you linked Easy68k.., didnt know about that.., thats cool.
it also sort of backs up my argument about not getting 1:1 instruction per cycle on an MC68000.
2 lines, 16 cycles.. so an average of 8 cycles per instruction. (ouch).
So we jump to the final example, of 7 instructions, at 56 cycles. See how we are not getting one instruction per cycle ?, so, yeah, no way in hell are you gonna get 1mips at 1Mhz out of an MC68000. again, an instruction per 8 cycles.
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The 68000 design was slow but had a nice ISA with many wide registers. The 68020 and 68030 could not even peak at 1 instruction/cycle. It wasn't until the 68040 that a peak of 1 instruction/cycle was achieved. It wasn't until the superscalar 68060 that an average of 1 instruction/cycle was surpassed (peak of ~3 instructions/cycle).