Yeah, I just looked at the 500+ schematic, I think it won't need any wires for 1MB, just the right jumper settings.
Jope, did you already make a similar board?
For the Gary adaptor, I tried to cater for two scenarios, the first one is easy, the second one more challenging with just NAND gates:
Scenario#1: 0.5chip 1.5slow - only 2 wires from Gary to trapdoor's 74139.
Chip 000000 - 07FFFF (internal, RAS0)
Slow C00000 - C7FFFF (trapdoor, RAS1, A20:A19 is 00)
Slow C80000 - CFFFFF (trapdoor, RAS1, A20:A19 is 01)
Slow D00000 - D7FFFF (trapdoor, RAS1, A20:A19 is 10)
Scenario#2: 1.0chip 0.5/1.0 slow - this requires an extra wire to JP2 (Agnus A19) to force RAS1 at $C0. I have chosen to use A23 instead.
Chip 000000 - 07FFFF (internal, RAS0)
Chip 080000 - 0FFFFF (trapdoor, RAS1, A23:A19 is 01)
Slow C00000 - C7FFFF (trapdoor,
RAS faulty, A23:A19 is 10)
Slow C80000 - CFFFFF (trapdoor, RAS1, A23:A19 is 11)
My suspicion is, in scenario #2, the A500 will normally assert a RAS0 for $C0, which needs to be overridden. But I'm not sure, I can't see Agnus's guts/logic. Does Agnus use A19 (pin 59) to decide which RAS?
Besides that, the adaptor also changes Gary's (or actually Agnus's) RGAEN and RAMEN signals in this way:
http://pibus.info/amiga/a501/1m5_gary2.png
I think I achieved _all_ of the above with just two 74F00s. Maybe.
Thanks for the links Jope, I'll have a read of those threads later.
Anyway... I tried to buy a A500+ motherboard on ebay.co.uk a few times, but you Brits don't want to ship them to AU for some reason. Are you hording them?
Quote:
Originally Posted by Jope
The table seems to make sense, but I must admit I only gave it a brief glance. :-)
The Haynie GARY doc might be a good thing to check too when figuring out the logic. Lots of noise from the family around me at the moment, so I am unable to concentrate properly on this.
http://www.thule.no/haynie/systems/a.../docs/gary.txt |