Cache design like this for Atari ST
http://atari4ever.free.fr/hardware/zip/mach16.zip can be translated to Amiga but in Amiga some areas should be excluded from caching.
Not sure about RAM size - 8MB can be DRAM can be SRAM (nowadays no problem 1 - 8 IC's) but... perhaps 64MB? (part can be used as Kick, part as ram disk perhaps recoverable?).
Personally i have few old MC68020/68881 PC ISA AT cards and for me PGA is natural choice (also i have few 68040 in Mac Quadra computers thus perhaps i can go to A500 with 68040 board but i have idea to rebuild Amiga and hide CHIP memory limitations from CPU but this is the point where perhaps FPGA Amiga recreations is simple better).
4 layers is today not so expensive but for sure it need to be ordered from specialized company - opposite to this 2 layer bard can be made in home even by printing directly ink on PCB.
All this lead me to Majsta project - FPGA accelerator with memory controller - probably cheapest and most perspective... but still simple A500 accelerator can have own users...
but once again - clockport, simple Ethernet, perhaps USB, IDE ... lot of things that can be nice... tough choice especially with limited time and resources... all this is pure hobby as similar to Majsta i have no will to do anything for Amiga commercially...