Quote:
Originally Posted by touko
I expected from you that you know what kind of RAM the archimedes has ,and it seems that you don't know that the amiga's chipram was DRAM,and it was a 2 cycles access at 7.16 mhz, so a 3.5 mhz .
The archie RAM is SRAM (static RAM) at 8 mhz,so a 1 cycle access RAM,this why the archimedes was so expensive.
The amiga was developed to be the most efficient possible with the cheapest ram possible,because RAM was the main cost for a computer at that time . .
i agree, this why it was very hard to sold, and also because at this time the atari ST was a better choice,until the A500 came out .
Really this is only your statement, the A1000 was in fact not really overpriced, because it include so many extension ports which were removed in the A500 to reduce costs, it was only overpriced like i said before, for the mass market .
Why not, if price was your first and main criteria,and there is a ton of games on those systems.
We all have our criterias for defining what's a good system,this is also why you and me,we'll never agree on this point .
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This is DRAM for the Archie, a Google search will prove it.
Where did you get this strange idea SRAM memory was used from ? Really ?
In the same pages stating that a sound chip must have one DAC per channel, maybe ?
Interesting ;-)
I know very well it is DRAM too for the Amiga, thanks ;-) (I know the hardware).
It is your statement that the D-RAM frequency is
3.5 Mhz that I am questioning.
(A polite way to say you are wrong, again, and don't know your Amiga. Again.).
So : I doubt what you say for the Amiga DRAM
at 3.5 Mhz is true, and it is easy to understand why simply with what you are writing : if there are 2 accesses at 7.16 Mhz, then automatically it means this DRAM is fast enough to 'respond' at 7.16 Mhz, so it is not max-3.5 Mhz capable RAM that was used.
Accessing at 7.16 Mhz some 3.5 Mhz DRAM would result in a crash or would be utterly unreliable.
My guess is that C= used widespread (at the time) 8 Mhz capable DRAM, that is 125 ns.
So there is nothing glorious about the Amiga development in this area.
If you look at the Archie, you can say that yes there is the implementation of something interesting as far as memory is concerned, since the ARM+MEMC makes use of fast page mode, meaning a 32 bit access in memory takes only 1 cycle, after the 1st access in a list of multiple accesses. (Usage of the LDM and STM ARM instructions)
Prove me wrong but no other CPU at the time (1987) could do that, and it is part of the explanation for the ARM based Acorn machines speed.
At the heart of the design of the chipset was this simple idea of maximizing usage of memory bandwith. (rendering the costly process of the design of ( and the need of ) a blitter irrelevant. The other reason there is no blitter is also that the ARM+MEMC always use the memory bus because of the ARM 3 stage pipeline architecture, so there is no idle cycle left on the memory bus that could be cleverly used by a blitter. I use 'cleverly' as yes, what the C= engineers designed is clever, and remarkable, I fully agree on that. It makes sense when you have a 68000 CPU so slow at accessing memory, and it doesn't when you have an ARM).
And yes as you stated in your conclusion, we'll never agree : not only the Archimedes wasn't that highly priced when you compare with other machines initial launch price ; but also the Archimedes is the only machine boasting its own innovative and revolutionary RISC CPU.
That means something. That is something huge in terms of technological leap forward. Of course it has a price.
Still, it was the cheapest machine in terms of MIPS per GBP, and it is why it's been worlwide praised and received various prizes for its stunning performances.