Quote:
Originally Posted by alexh
I disagree. While you wouldnt clone the chips 100%, it would be very easy to make something simple that was a VGA register set compatible. There is lots of information out there including reference code.
http://www.opencores.org/projects.cg...a_lcd/overview
Surely it's more important to have a standard VGA programmers interface with chunky pixels than an "as yet" unused AAA implementation? |
The AAA implementation I plan will have chunky pixels.
For every plane, you can choose the depth : 1 (normal Amiga mode), 2,4 or 8 bits per pixels. It is really easy to do in an FPGA : every plane will have a 2048 bytes FIFO (this way, scan doubling does not consume DMAs). The write port will be 32-bit wide and the read port will be 1,2,4 or 8-bit wide. The bits from a plane can be combined with the bits from another plane to index one or more color palettes (up to 8) or feed some HAM block (up to 4). The YUV mode is done by setting 3 palettes with Y -> RGB, U -> RGB and V -> RGB LUTs and activating some adders in the RGB pipeline. In RGB mode, the palettes are just bypassed.
Imagine : you want a WB with a HAM10 backdrop picture. You setup:
- Plane 1 in 8-bit mode (HAM10 data)
- Plane 2 in 2-bit mode (HAM10 command)
- Plane 3 in 4-bit mode (16 color WB) or 8-bit mode (256 color WB)
You want a video in a window ? You setup Planes 4,5,6 as 8-bit plane with their palettes with YUV coefs. And voila.
With the current bus speed I can display up to 5 8-bit planes in 1280x1024, 60 Hz.
Of course each plane will have its own modulo, shift value, pixel resolution (very useful for YUV 422 or 411) and maybe display window.
Regards,
Frederic