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Old 25 November 2012, 14:01   #48
pandy71
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Join Date: Jun 2010
Location: PL?
Posts: 2,743
Quote:
Originally Posted by jkonstan View Post
Any updates on the Eagle files for this redo of the Lucas/Frances project?
A lot of the potential signal integrity issues on the 4 layer PCB can resolved by adding a series termination resistors@ 22 to 33ohms (i.e. high speed edge rate nets such 68020 CPU bus, PLD, CLocks, etc ...) and eliminating any long stubs on the transmission lines/routes.

i've started Eagle 2 layer version but currently this is suspended - at this point i still consider to restart project with free an open sourced kicad (libraries from Eagle for kicad are available)
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