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Old 02 February 2016, 23:16   #32
Mrs Beanbag
Glastonbridge Software
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Join Date: Jan 2012
Location: Edinburgh/Scotland
Posts: 2,202
the way i like to think about the Blitter is as a single cell of a dynamically-programmable FPGA connected to a DMA channel. It is basically a really simple stream processor. The logical progression, to my mind, is to simply have lots of them (with maybe some boosted functionality), able to run in parallel or maybe even in series.

Last edited by Mrs Beanbag; 02 February 2016 at 23:26.
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