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thebajaguy · 23 February 2021, 08:52

I have an A4000T with the TekMagic (ultrasound) 68060 board in it. It does get picky about expansion slots.

I am chasing a bug of possible long-standing with regards to 68040/68060 CPU bus behavior and Zorro II (16-bit) resources, and it could impact other expansion cards. If you can make Setpatch not set the data cache on (an option on the command's line) and behavior improves, try either the original v37.4 68040.library (uses conservative settings, and doesn't allow burst to Z2), or use the MuLibs 040/060 libraries (as applicable) and MuSetCacheMode tool to disable the entire 8M z2 address range (address 00200000 and size 00800000 for test). If the CPU is allowed to do a burst read or write against a peripheral in that space, unexpected results can happen when 4 longword accesses hit a board's interface registers, and trigger something they shouldn't, but 16-bit Zorro cards in the Z2 'big' 8M space may get set incorrectly, and the CPU tries to burst against it. I've already ID'd lockups or crappy performance happen with 16-bit FastRAM and Copyback/Writethrough burst happening against them (A2091's FastRAM and a GVP HC8's FastRAM, for example). I've already looped in a few CPU library maintainers on the topic. MuLubs has a few manual options including the one above that can already address it. Some trial and error may be needed to match it to a custom system.

23 February 2021, 08:52	#14
thebajaguy Registered User Join Date: Mar 2017 Location: Rhode Island / United States Posts: 203	I have an A4000T with the TekMagic (ultrasound) 68060 board in it. It does get picky about expansion slots. I am chasing a bug of possible long-standing with regards to 68040/68060 CPU bus behavior and Zorro II (16-bit) resources, and it could impact other expansion cards. If you can make Setpatch not set the data cache on (an option on the command's line) and behavior improves, try either the original v37.4 68040.library (uses conservative settings, and doesn't allow burst to Z2), or use the MuLibs 040/060 libraries (as applicable) and MuSetCacheMode tool to disable the entire 8M z2 address range (address 00200000 and size 00800000 for test). If the CPU is allowed to do a burst read or write against a peripheral in that space, unexpected results can happen when 4 longword accesses hit a board's interface registers, and trigger something they shouldn't, but 16-bit Zorro cards in the Z2 'big' 8M space may get set incorrectly, and the CPU tries to burst against it. I've already ID'd lockups or crappy performance happen with 16-bit FastRAM and Copyback/Writethrough burst happening against them (A2091's FastRAM and a GVP HC8's FastRAM, for example). I've already looped in a few CPU library maintainers on the topic. MuLubs has a few manual options including the one above that can already address it. Some trial and error may be needed to match it to a custom system.