Quote:
Originally Posted by ReadOnlyCat
It needed more than a few changes. As has been hinted, the bus bandwidth is not that great and even a slightly faster blitter would have been hampered by that. The system needed a whole redesign rather than an evolution here or there.
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Of course. The problem is the bus bandwidth. It should be doubled on Aga machine. At least have 2 bus: one for bitplanes and another for the other chip