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Old 14 October 2019, 08:54   #13
meynaf
son of 68k
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Join Date: Nov 2007
Location: Lyon / France
Age: 47
Posts: 3,690
Quote:
Originally Posted by Bruce Abbott View Post
So in the end Motorola switching to PPC and Commodore going bankrupt was a good thing for retro Amiga fans, because it froze the design when it was at its best.
An often overlooked point.


Quote:
Originally Posted by AmigaHope View Post
Imagine what could have been done in making it faster with the might of a big company like Intel like they did with the way-less-elegant x86 instruction set.
Horrors maybe ? x86 wasn't nice to start with, but today it is a complete mess. Hopefully the 68k didn't get all the garbage they added during the years (something like >1300 instructions overall ?).


Quote:
Originally Posted by NorthWay View Post
I've been trying to keep up with modern cpu design wisdom and the contortions going on behind the scenes in a modern one is frightening.
It may be frightening but at least it works. Intel cpus may be internally horrors, but in performance they are awesome.


Quote:
Originally Posted by NorthWay View Post
So much so that I think the Itanium/VLIW in principle was right, it was more the particular implementation and the failure to have compilers back it up that has made everyone shun them.
But it wasn't right. And the failure to have compilers back it up was just a natural consequence.


Quote:
Originally Posted by NorthWay View Post
Which is why I am so keenly keeping an eye at what the people behind the "Mill" is doing. It feels like a cpu designed by compiler writers - when something is difficult they get an architecture feature to help them succeed.
Splitting instructions streams isn't exactly a way to make code more readable, and readable code is the key to efficient programs. For me it doesn't feel at all like a cpu designed by compiler writers (which could have been a good idea indeed).


Quote:
Originally Posted by NorthWay View Post
They really believe you can do massive amounts of operations at once (unlike conventional wisdom which says it maxes out around 5),
Doing massive amounts of operations at once is already possible. You can do that with a GPU or many cores.
Yes for single core general purpose cpu it maxes out around 5, i would have said 4, and this number is a maximum not always reached because of dependencies - so more wouldn't make any sense.


Quote:
Originally Posted by NorthWay View Post
and have done lots of work to shrink opcode size
Are you sure they are really doing that ? It's the opposite of VLIW.


Quote:
Originally Posted by NorthWay View Post
and to expose inner parts of the architecture to the sw side.
That's THE mistake cpu designers shouldn't do. Exposing the implementation to the sw side is bound to failure because implementations change all the time.


Quote:
Originally Posted by turrican3 View Post
What is specific to the x86 that the 68k didn't have, to continue the road ??
Massive amounts of money.
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