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bernd roesch · 30 January 2018, 16:05

replace the JIT is not easy. The main problem is that the JIT must check every branch command if a new amiga chipset event need execute.

this cost lots time.

because the problem with X86 is that the CPU flag register need stay correct . and when do the X86 asm commands that check if a new chipset event occur, this register is trash when it is not save.
so the JIT code contain a commands pushf popf. this save and restore teh flags. The problem with this 2 commands is that they need more time than only 1 clock cycle. I think popf/pushf each use 10 X86 clock cycles

https://en.wikipedia.org/wiki/FLAGS_register

so short loops in 68k get very slow for example

loop clr.l (a1)
subq #1, d0
bne.s loop

every time the bne is execute the JIt add code to check if a chipset event happen. (sound, dma, keyboard, mouse CIA)

now we have 2018 with AVX and virtualisation extenstions in CPU, but i did not know if there is a way that the JIT can add some X86 commands to check for chipset events, and the flag Register of X86 is not trash

If AVX or SSE have own flag register and a value compare do not change normal X86 flag register then can avoid that pushf and popf need use and so speed up much

30 January 2018, 16:05	#22
bernd roesch Registered User Join Date: Apr 2012 Location: germany Posts: 139	replace the JIT is not easy. The main problem is that the JIT must check every branch command if a new amiga chipset event need execute. this cost lots time. because the problem with X86 is that the CPU flag register need stay correct . and when do the X86 asm commands that check if a new chipset event occur, this register is trash when it is not save. so the JIT code contain a commands pushf popf. this save and restore teh flags. The problem with this 2 commands is that they need more time than only 1 clock cycle. I think popf/pushf each use 10 X86 clock cycles https://en.wikipedia.org/wiki/FLAGS_register so short loops in 68k get very slow for example loop clr.l (a1) subq #1, d0 bne.s loop every time the bne is execute the JIt add code to check if a chipset event happen. (sound, dma, keyboard, mouse CIA) now we have 2018 with AVX and virtualisation extenstions in CPU, but i did not know if there is a way that the JIT can add some X86 commands to check for chipset events, and the flag Register of X86 is not trash If AVX or SSE have own flag register and a value compare do not change normal X86 flag register then can avoid that pushf and popf need use and so speed up much