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Old 03 October 2019, 21:22   #51
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Join Date: Jun 2010
Location: PL
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Originally Posted by ross View Post
mmh, transition betwheen states (for the data output ) occurs whenever the period counter counts down to one.
How you can force this transition and reload AUDxDAT on the very bandwidth limited internal bus and also reset the IRQ?
I don't think it's possible but I'd be happy to be denied
Re-arm Audio DMA with Copper? - place word in AUDxDAT then arm audio DMA? or in opposite way? first trig Audio DMA with single word length in AUDxLEN and sample placed in AUDxDAT - key to high quality audio is stable sample timing - such regular timing can be provided only trough DMA

I think on other approach - using two channel but in special pattern - sample sequence split on odd and even samples, form word made from odd byte + 0 (null) on one channel and on second channel even sample + 0 - sequence will be like 0;odd;0;even;0;odd;0;even;0;odd;0;even...

Originally Posted by ross View Post
Yes, PAN is a lack
PAN and NCO - for N bit NCO frequency resolution uniformly distributed across whole frequency range will be:

@N=16 bit (fit in current register map 1:1) - 54.1213226318359Hz
@N=20 bit 3.38258266448975Hz
@N=24 bit 0.211411416530609Hz
This means no problem with CD audio playout (44.1/22.05kHz vs Amiga AUDxPER)

btw same rule for UART...
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