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Old 23 December 2014, 18:28   #712
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Join Date: Jan 2012
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Originally Posted by Toni Wilen View Post
This is yet another undocumented 68000 behavior, it seems interrupt line sampling is microcode controlled and different instructions sample it in different phases during instruction execution... (Fortunately in Amiga only MOVEs matter because custom registers are read-only or write-only)
Ah, this explains why MOVEM.L + DIVS has a longer latency than a pair of MOVEM.L or DIVS.

MOVEM.L must sample very early and DIVS very late. Together they have potential 300+ cycle latency.
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