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Old 19 September 2014, 02:50   #40
DarrenHD
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Join Date: Aug 2008
Location: London / Canada
Posts: 339
Quote:
Originally Posted by Ratte View Post
Regarding unaccessible pci-roms on grex-pci-bridges.

I found out that there might be some kind of mmu-protection around pci-devices used in a grex-board.
Is not easy to get in touch with a rom from a installed pci-device (graphiccards).

Following the pci-specs its easy to point the xrombar to somewhere in the (unused) memorymap and perform a read on it (to build a shadowrom).
After reading the rom, the xrombar must be disabled and the normal bar must be reactivated for normal memoryaccess (graphicsmem).
The grex-problem .... its possible to act normal with the xrombar and bar registers, but the rom is INVISIBLE.

Now pci-specs told us, that you can read a rom or access the memory, but not both at the same time.
So i decided to check what will happen, if i set the xrombar to the memarea where the (deactivated) bar is pointing to ... and voilą ... finally the pci-rom is visible!
Pointing with xrombar to the same area like the deactivated bar (graphicsmem).

Next steps are daily business ... copying the rom to somewhere in the ram .. disable xrombar, activated (mem)bar and so on ...

I just send a message to Radoslaw (strim?) for the netbsd-grex-port.
Maybe on day, the os4-team is able to handle a grex-pci-bridge.
Hi Ratte, further to the NetBSD documentation in setting up the GREX here is some of the code:

1/
move.l #$FFFE0000,a0
move.l (a0),d1
nop
andi.l #$80000020,d1

2/
move.l #$FFFE0000,a0
moveq #2,d0
move.l d0,(a0)
nop
move.l #$FFFE0010,a0
moveq #1,d0
move.l d0,(a0)
nop
move.l #$FFFE0020,a0
moveq #1,d0
move.l d0,(a0)
nop

3/
move.l #$FFFE0000,a0
move.l (a0),d7
nop
clr.w d7
swap d7
lsr.l #8,d7
moveq #$F,d1
and.l d1,d7
moveq #2,d0
cmp.l d0,d7
bcs.b JL_0_31C
move.l #$FFFE0040,a0
move.l d0,(a0)
nop

4/
lea $FFFE0000,a1
nop
move.l (a1),d2
nop
swap d2
andi.l #$000000FF,d2
bne.b JL_0_20E4
nop
clr.l $30(a1)
nop
move.l (a1),d2
nop
andi.l #$00000003,d2
bne.b JL_0_20E4
nop
move.l #$00000003,$30(a1)
nop
move.l (a1),d2
nop
andi.l #$00000003,d2
cmpi.w #$0003,d2
bne.b JL_0_20E4
moveq #1,d0
JL_0_20DA
move.l d1,8(a0)
movem.l (sp)+,d2/a5-a6
rts
JL_0_20E4
moveq #0,d0

5/

We are trying to preserve the information for the Amiga community so it is not lost as source code is lost or knowledge lost by people passing away, etc. I know it is a long shot, We suspect there are additional registers 020, 030, 040:

0xFFFE0000 = 2 (Endian swapper, write 0x02 to switch bridge into big endian mode)
0xFFFE0010 = 1 (Interrupt Enable - write 0x01 to enable Interrupts (INT2 on Amiga side)
0xFFFE0020 = 1 ?
0xFFFE0030 = 3 ?
0xFFFE0040 = 2 ?

Any help you could give would be most appreciated....
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