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Old 05 August 2014, 21:57   #12
phx
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Join Date: Nov 2009
Location: Herford / Germany
Posts: 988
Oh... missed your new posting, while writing mine.

Quote:
Originally Posted by Toni Wilen View Post
REG_LOCK: Bit 0 is the only one that can be changed. (Write 0x81 -> gets set to 1 and 0x01 -> cleared).
Ok, and clearing bit 0 causes a strange PPC->M68k level 2 interrupt?

Quote:
Other bits won't change. This register is normally used to unlock flash chip write mode by writing "magic" values in sequence. (0x60, 0x50, 0x30)
But it also unlocks REG_SHADOW. I verified that. Otherwise I don't understand why you unlock the flash for rebooting the system.
Do you know at which address the flash is written after that.

Quote:
IPL_EMU m68k IPL bits seems to be stuck at 7, writing won't change them, reading them in interrupt routine (I used level 3) still returned 7.. Even when ENABLE_IPL was active. DISABLE_INT bit is also stuck at 1. So apparently it is read-only too and perhaps DISABLE_INT and m68k IPL bits only work when PPC is active? (Or maybe even when PPC is interrupt master?)
I would guess it starts working with PPC interrupt master. I'm definitely using DISABLE_INT with PPC interrupt master while setting the new PPC_IPL, which is usually done in two steps: set PPC_IPL bits, with DISABLE_INT set, then clear PPC_IPL bits and DISABLE_INT. So no interrupt can occur while PPC_IPL doesn't have the final value.

Quote:
REG_IRQ: Clearing both bits 3 and 4 (not 2 and 3) are confirmed causing an interrupt. System froze when I cleared both Bits 2 and 5 can be also set or cleared. Bit 6 is stuck at zero.
About which register are you talking here? REG_IRQ = REG_INT ?

Quote:
Speculation mode: PowerUP does something more if I trigger PPC interrupt when bit 0 is active (zero).
Can't follow here. Bit 0 of which register?

Quote:
BlizzardPPC flash unlock is totally different. REG_LOCK most likely only has single function, bit 0 + bit 3 is always set as a "I am BPPC" identification bit that for example flash updater checks.
Bit 0 and 3? Wasn't bit 0 your mystery cause-interrupt strobe? Then that wouldn't work on BPPC? And writing has no effect at all?

Quote:
Write $42 to $f60092: write-enable flash, write to $f60093: read-only flash.
Wow! Never heard of these registers. Write any value to $f60093? And writing a value != $42 to $f60092 doesn't write-protect the flash again?


Quote:
Also maprom works differently, write $f60012: maprom on, write to $f60013: maprom off.
Ah! I only knew the maprom-off register as BPPC_MAGIC. So this is not required to unlock something, as I first suspected, but just to turn MapROM off, before a reboot.

Very good progress in reengineering here.
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