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Old 01 August 2014, 18:44   #173
Toni Wilen
WinUAE developer
Join Date: Aug 2001
Location: Hämeenlinna/Finland
Age: 42
Posts: 19,524
Second PPC status report:

PearPC CPU core does work. Instructions are executed, it does some poking to board's IO addresses but unfortunately I am not sure how addresses F60030 and F60038 work.

Only available information comes from netbsd and linux sources:

/* IPL_EMU 0x30 */
#define P5_DISABLE_INT 0x40 // if set: all CPU interrupts disabled
#define P5_M68K_IPL2 0x20
#define P5_M68K_IPL1 0x10
#define P5_M68K_IPL0 0x08
#define P5_PPC_IPL2 0x04
#define P5_PPC_IPL1 0x02
#define P5_PPC_IPL0 0x01
#define P5_IPL_MASK 0x07
/* INT_LVL 0x38 */
#define P5_LVL7 0x40
#define P5_LVL6 0x20
#define P5_LVL5 0x10
#define P5_LVL4 0x08
#define P5_LVL3 0x04
#define P5_LVL2 0x02
#define P5_LVL1 0x01

Something to do with interrupts but are they input or output or both? Mainboard inputs? Does writing cause interrupts? What?

But at least BPPC now boots to amigados and PPC CPU is stopped quite soon after it has been started.

Memory is currently directly accessed from PPC thread and all IO addresses are put to queue that m68k side handles and replies. Not very optimal but only way to make it work without extra complexity.
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