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Old 29 July 2014, 00:36   #1
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Join Date: Jul 2014
Location: Ottawa/Canada
Posts: 49
I am working on a FPGA board (prototype)

Just want to share this bit of new with you.

I am currently designing a FPGA board for running Amiga Emulation. It is a FPGA evaluation board that I have specifically designed for computer (rather than the other way around). Yes, I am well aware of some of the FPGA evaluation boards and the FPGA Arcade. They look very good specs-wise too.

Mine is very loosely based on the spec of the Mist - namely the FPGA resources and SDRAM size, but that's where the similarity ends. I tried to pick parts with decent performance value ratio as I am doing this out of my own pocket and am on a budget.

FPGA: Altera EP3C24 - Same density as Mist, but larger package for I/O
SDRAM: 32M Bytes - 32-bit wide data bus
PLL: Si5351, programmable clock x 3, programmable from ARM
ARM: Freescale MK22DX256VLF5 256kB FLASH, 64kB RAM, USB OTG, RTC
Audio: AKM Audio CODEC + TI DirectPath Headphone Amplifier
Storage: 2mm Parallel ATAPI connector (for 2.5" HDD), MicroSD socket, 16 onboard SPI FLASH. There are lots of under $10 bi-directional PATA - SATA1 converters out there.
Ethernet: Microchip ENC624J600 10/100 Base T
PS/2: 1 connector (connected to ARM), but can use with a splitter to connect to keyboard and mouse.
USB OTG: One port, 1.5Mbps/12Mbps (connected to ARM)
RTC: Real Time Clock (on ARM). ARM is powered under standby and have software power On/Off control of the rest of the board. There is Supercap backup in case the main power is out.
Video: VGA, RGB 6-bit R2R DAC, buffered
Expansion port: High speed serial link for a daughter card. It is for a processor or FPGA card etc. So if there is a more shiny FPGA, move the CPU core over there and run this card as a slave for its I/O.
Size: 10cm x 10cm. Width of a 2.5" HDD.

Current status: I have been designing the hardware for last 3 month with my own time and money. My blank proto PCB is on its way (25 days) from China. So realistically going to have put in another 2-3 months before I'll get it to work. Most of the extra features requires a lot of FPGA/firmware/drivers to work.

Project detail, pictures and logs hosted:
There are a bit more details over there. I'll get the schematic released under open source at some point. This is towards a contest, so that's extra motivation for me to finish this work. Not expected to win the top 5 prizes due to competitions. Hopefully, I'll at least get some recognitions.

You can read up there without registration. Or if you want, you can register and comment, complement etc. No one seem to say anything over there at the moment on my project. Wrong crowd I guess.
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