Originally Posted by Schoenfeld
Slowdown for the ACA630 in those "tests": Data burst has been switched off, and Maprom isn't activated. This Furia board is fast, but why run the "competition" (which isn't really competition because it's not available any more) with the handbrake on?
Data burst rarely gives the same performance improvement as instruction burst and sometimes it can result in a reduced performance. That's probably why Setpatch keeps it disabled by default.
Since burst is a cache mode the best case performance is obtained only if the cache line has the next sequential operands requested by the CPU. This works well most of time for program code (but not very well for JMP, JSR and RTS instructions for example).
However, data structures often may be non-sequential or fragmented within memory resulting in worst case performance when burst mode is used... and to make matters even worse they may be located on odd address boundaries resulting in a burst wrap around effect.
is one of the very few DRAM controllers which can handle the burst wrap around problem.