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Old 21 September 2013, 17:29   #100
amilo3438
Amiga 500 User
 
Join Date: Jun 2013
Location: EU
Posts: 1,114
Quote:
Originally Posted by Toni Wilen View Post
Amigas can have sync or async CPU clock. A500 (and other 68000 based) and A1200 are sync. CPU clock = chipset master crystal (28.xMHz), usually divided by some power of 2 integer value. 7.xMHz, 14.xMHz, 28.xMHz are the usual values.

Async = CPU has separate clock crystal, for example any 25MHz or 33MHz (or more.). Only when CPU needs to access chipset addresses, CPU syncs with chipset clock (= CPU waits, sometimes it can be quite long wait), does the access and then continues normally.
Thanks for clarifying this with very detail explanation.


EDIT: Last question ... If chipset master crystal=28.375160 why we have then in freq. option multipliers instead of dividers ?!

For example now we have choices with multipliers (instead of dividers):

1x 3.549865 (= master clock / 8)
2x 7.093790 (= master clock / 4)
4x 14.187580 (= master clock / 2)
8x 28.375160 (= master clock / 1)

Does 3.549865 freq. meaning something important?

As is a little confusing. Never understood why is this freq. chosen to be 1x instead of 7.093790 , as there is no Amiga exist that runs in freq. lower than this one.

Last edited by amilo3438; 21 September 2013 at 18:40.
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