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Old 21 September 2013, 16:51   #99
Toni Wilen
WinUAE developer
 
Join Date: Aug 2001
Location: Hämeenlinna/Finland
Age: 42
Posts: 19,518
Quote:
Originally Posted by amilo3438 View Post
LTP4 MEGADEMO by x-metal force crew

On 3rd demo called "beirosinus" some glitches appears!
Exact same on A500. Probably needs some specific config to not have glitches.

Plasma part bugs are also exact same.

Quote:
Originally Posted by amilo3438 View Post
Mentioned this as found both to be under same "Cycle-exact CPU Emulation Speed" option ... very confusing ?!

I always thought that cycle-exact = sync clock to chipset.
Amigas can have sync or async CPU clock. A500 (and other 68000 based) and A1200 are sync. CPU clock = chipset master crystal (28.xMHz), usually divided by some power of 2 integer value. 7.xMHz, 14.xMHz, 28.xMHz are the usual values.

Async = CPU has separate clock crystal, for example any 25MHz or 33MHz (or more.). Only when CPU needs to access chipset addresses, CPU syncs with chipset clock (= CPU waits, sometimes it can be quite long wait), does the access and then continues normally.
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