Originally Posted by hooverphonique
I know.. still, dma bursts wider than 32 bits would be possible from a pci card to the zorro-pci bridge on the busboard, which is what I was referring to
Not correct. A burst can only be as wide as the bus (32 bits), and as deep as the cache line (note that Motorola CPUs can only burst into/out of cache). Since networking is an IO thing that MUST NOT be cached, there are no bursts either.
That brings you back to square one: Pedal to the metal on PIO, otherwise you lose time. That's what the X-Surf-100 is doing.