The configtool re-configures the FPGA quite often (twice on every "test" or "apply" click), which causes sync signals to the monitor being turned off for a fraction of a second. It also happens here that I get a black screen. However, it's not the flickerfixer that causes it, but the monitor is in an undefined state, because it does not like switching between resolutions all the time. I have a setup that connects VGA and DVI monitors at the same time, plus a multisync monitor on the 23-pin RGB port of the Amiga (yep, three monitors showing the same image). Mostly the Dell DVI monitor is the one that goes into power saving after switching modes too often.
The "drag screen and turn black" thing is worth investigating. Can this be reproduced? This may be in line with a problem we have between two computers: One of them cannot display Euro72 with the number of lines that my Amigas produce. All my Amigas show Euro72 (non-lace) with 416 lines. However, the Amiga of the author of the config tool shows Euro72 with 402 lines, which causes the screenmode recognition to fail. We've tried using my overscan settings file, my screenmode settings file and my monitor types, even jumpered the machines to PAL or NTSC, but it's always the same: One computer shows Euro72 with 416 lines, the other just 402 lines (switch on OSD debug line, first number on the left is the number of lines). Any hints welcome, because this is just weird behaviour.
Same goes for offsets of the screenmodes: These are different for just about every computer, because the overscan prefs are set to different values. It will therefore be required for almost everyone to tick the "override limits" menu item and set offset values to something that matches your overscan prefs settings.
keropi, if you're generating a 75Hz screen, I'm assuming that you are using a pretty high pixel clock. However, this may cause the memory to underrun, because memory is currently only running at just over 120MHz. For pixel clocks over 126MHz, this may cause trouble, resulting in distorted picture and trash being displayed especially in the right parts of the screen. For such high pixel clocks, I'll have to increase memory clock speed, which is on the todo list. The whole design is geared towards a memory performance that supports the maximum pixelclock that the DVI encoder supports: 165MHz. However, it requires quite a bit of tweaking, and with other options missing (such as line tripling, output pixel doubling), this is fairly low on the todo list. Better stick with output pixel clocks under 126MHz for the time being.
There's still some debugging to do on the output side. The "blue shadows" that user demolition has revealed is something that I think may be located there, and there's also more tweaking to do on the DVI PLL settings. The "black screen" effect after changing screenmodes too often may be cured with a more sophisticated PLL init procedure, which is also on the todo list.
Further, I have ordered three more DVI displays with different panel sizes: One Samsung, one Acer and one HP. I'd like to make sure that they all work before I continue sales of Indivision AGA MK2.