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Old 27 December 2012, 22:06   #18
Toni Wilen
WinUAE developer
 
Join Date: Aug 2001
Location: Hämeenlinna/Finland
Age: 42
Posts: 20,476
Quote:
Originally Posted by mark_k View Post
I guess you could delay vhposr reads for a short while, if the value which would be returned is unchanged from the previous read? That should satisfy the ROM genlock check code. Could it adversely affect any other programs?
Yes, it would kill perforrmance and in fastest possible modes chipset clock cycles are accumulated slowly and only when there is enough, all cycles are mulated in single pass. Which means v/hpos counters stay the same for a long time and then suddenly get change by one or more lines.. This all just to make it as fast as possible (and to allow JIT to work because it can execute hundreds of m68k instructions in one pass)

It is easy to detect when genlock test is done (BPLCON0 = 0x0102 which is never used normally) but bypassing above cycle accumulation stuff isn't that simple.

Quote:
With interlaced video input to the genlock I assume Agnus is forced to generate alternating long/short fields corresponding to the input video. Perhaps writing to the LOF bit does nothing in that case???
LOF bit still does something.

Remember that LOF bit only does two things:
1) Agnus starts vblank if vpos counter + (LOF ? 0 : 1) == maxvpos. (+LOF gets inverted now if BPLCON0 lace bit is set)
2) Agnus hsync output includes long/short field pulse stream (equalizing pulses that TV uses to detect field type) during vblank period. (I am not sure what happens if LOF is changed during this time)

2) of course can't happen in genlock mode, lines are input only

But mode still becomes interlaced because genlock forces vblank (via Agnus vsync input) maxvpos - 1 every other line.

Quote:
I wonder what would happen when non-interlaced video is input to the genlock. Remember in that case VSYNC is pulsed every field for both all-long and all-short fields input video. And what if you try to use an interlaced Amiga mode then? Best guess, the genlock output would be non-interlaced with all Amiga fields output as long (or all as short).
I don't think this is officially supported = I don't really care.
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