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Old 27 December 2012, 20:17   #17
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I guess you could delay vhposr reads for a short while, if the value which would be returned is unchanged from the previous read? That should satisfy the ROM genlock check code. Could it adversely affect any other programs?

With interlaced video input to the genlock I assume Agnus is forced to generate alternating long/short fields corresponding to the input video. Perhaps writing to the LOF bit does nothing in that case???

I wonder what would happen when non-interlaced video is input to the genlock. Remember in that case VSYNC is pulsed every field for both all-long and all-short fields input video. And what if you try to use an interlaced Amiga mode then? Best guess, the genlock output would be non-interlaced with all Amiga fields output as long (or all as short).
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