View Single Post
Old 22 December 2012, 20:24   #5
mark_k
Registered User
 
Join Date: Aug 2004
Location:
Posts: 2,481
It's correct that video sync signals are generated either by Agnus or by the genlock. When generated by Agnus they are output on the VSYNC and HSYNC Agnus pins which connect directly to the 23-pin video output connector.

When sync is being generated by the genlock however, the genlock itself generates horizontal and vertical video sync signals. Or more accurately, it basically passes through sync signals extracted from the incoming video source to the genlock video output. The genlock doesn't send those sync signals to the Amiga. Instead it sends horizontal and vertical reset pulses to Agnus on the HSYNC and VSYNC pins of the Amiga video connector. So in that case what's input to the Agnus HSYNC and VSYNC pins aren't normal video sync signals, just half-line-rate or half-field-rate pulses. When the ERSY bplcon0 bit is set, Agnus uses those reset pulses to synchronise the Amiga video signal with the genlock video source. If you're able to hook up a genlock to your logic analyser-enhanced Amiga, check what's on the Agnus HSYNC and VSYNC pins when there is interlaced video input to the genlock.

Basically, when Agnus is synced to the genlock video, you'll get vertical blank interrupts corresponding to the field rate of the genlock video source. But on A500/600/1200 the CIA-A TOD will be half that rate if the genlock video is interlaced (as all "proper" video signals will be).

I took a quick look at the genlock-detection code in Kickstart 40.70. It seems to do this:
  • Loop calling VBeamPos (reads vposr/vhposr, returns vertical beam position) until position is between 20 and 160.
  • Write $0102 to bplcon0 (set GAUD and ERSY bits).
  • Read vhposr 373 times. Read vhposr again. If the horizontal positions of the last two values read differ, then genlock is present. Set GfxBase->gb_system_bplcon0 to $302 (COLOR+GAUD+ERSY).
  • If the horizontal beam position isn't counting, set GfxBase->gb_system_bplcon0 to $200 (COLOR). Check whether CIAA TOD is counting. If it is, set TODA_SAFE bit in GfxBase->DisplayFlags. So in the usual case of no genlock connected, TODA_SAFE is set if CIAA TOD counts independently of vertical sync. So that bit should be set for A1000, A2000, A3000 but not for A500/600/1200.
Regarding the VSYNC/power supply CIA-A tick source: It seems all big-box Amigas use the power supply tick by default. A2000 and A3000 can be jumpered to use VSYNC instead. Probably the A4000 can too but I don't have schematics for that. All-in-one Amigas (500/600/1200) can only use VSYNC.

Update: The CDTV, A4000 and A4000T have VSYNC connected to CIA-A tick pin. I guess Commodore went with PC-style power supplies for the A4000(T); no tick signal from the PSU explains why VSYNC is used instead.

Last edited by mark_k; 22 December 2012 at 23:09.
mark_k is offline  
 
Page generated in 0.09454 seconds with 9 queries