Here's a preview for pixel-exact 1280x1024@60Hz output (63kHz line frequency, just under 108MHz pixelclock). CAUTION: Only PAL, NTSC and XTREME screenmodes are supported by this core!
Overscan is cut off with this core. Even some "regular pixels" are missing, and the picture position isn't perfect either. The most important thing is that this core controls each pixel without stretching/scaling if you have a 1280x1024 screen (that's the size that happens to be my most piccy TFT display timing-wise).
Everyone of you should be able to verify proper operation of his/her hardware with this core. Meanwhile, we continue work on the configtool, which is NOT in this archive. This is just a core-preview!
The name B15 is derived from the pixelclock that this core uses. B is the divisor 2, and 15 is the clock multiplier. The base frequency is half the SHires pixelclock of the Amiga, which is 14,31818MHz on an NTSC machine. This results in an exact pixelclock of 14,31818*15/2=107,39 MHz. On a PAL machine, you will get 106.4MHz, which is still close enough to the recommended 108MHz for the standard Vesa screenmode of 1280x1024.
We'll continue working on this, and work will make much faster progress now that the core loads it's configuration from flash. Before this, I had to enter fixed values in the source code and do a re-compile for every tiny bit that I wanted to try on sync-length, padding-pixels and output sizes. These values are loaded from the config-area now, and most of the values are interpreted correctly by this core. Yep, there's still bugs, so for trying new values, we have to mind a few funny rules that I won't even document. That time is better spent debugging ;-)
Last edited by Schoenfeld; 20 August 2013 at 22:43.