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Old 23 August 2011, 01:58   #2174
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Originally Posted by Schoenfeld View Post
You're thinking wrong. Burst-fill for cache lines gives a significant performance improvement. Even more than other accelerators, because the ACA1230 and ACA630 cards abort the burst at the end of the cache line instead of wrapping around and completely filling the cache line. The memory controller even decides not to do a burst if the first data word would be the last in a cache line, as this would truly slow down.

Further, with a burst, the first-access-penalty only applies to the first data word. The following data words are transferred within a single cycle - four times faster than the first access. With the ACA's SD-Ram, the 68030 can transfer one data word per cycle. Most (if not all) older accelerators required two cycles per data word because of the slow memory chips of the time.

There's hardly any scenario where burst slows down execution (I could only think of artificial scenarios).

Cool, I'm happy to be corrected
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