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Old 14 February 2011, 18:48   #402
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Join Date: Jan 2004
Location: Oxford
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Originally Posted by TheCyberDruid View Post
When I read stuff like 'Frame generation .......... ECS, fixed 28MHz pixel clock', I wonder why they don't just implement their SuperAGA logic?
Cos it is vapourware? I believe in Thomas Hirsch as an engineer. His posts are logical and concise. Little or no bragging or bull. If he can find the time to do it then I believe something will get implemented eventually.

Whether it will be value for money on current generation FPGA silicon is another matter.
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