Originally Posted by Cosmos
>Unless Cosmos made some other hacks?
The SDRam can handle 133 Mhz !
the SD-Ram could only handle such a high frequency if there are enough NOP commands inserted.
The SD-Ram access is:
cycle 1: row-open
cycle 2: column access
cycle 3: NOP (for CL=2)
cycle 4: data take-over and row-close
cycle 5: first possible point for next row-open.
The datasheet clearly states that there must be 20ns space between row-open and column access. The same is true for the time between row-close and the next row-open: This must be 20ns or more.
If you clock faster than 50MHz, then you'd have to do:
3. column access
5. data take-over & row-close
7. first possible point for next row-open.
By overclocking, you are operating the memory out of spec in two critical points. Also, you're moving the phase between memory clock and the command-input. As a result, your computer will not be stable. The CPU might take the overclocking (it's well-cooled), but you're likely to get memory problems.