Originally Posted by Schoenfeld
They probably do 4-2-2-2. You can't do X-1-1-1 with normal D-Ram. I make excessive use of SD-Ram features here.
There's two things that may cause a burst to be slower:
1. you start it when it doesn't make sense (at the end of a cache line)
2. you run it all the way through, 4 longwords, "no matter what".
My ACA cards will only start a burst if it's NOT at the end of a cache line, and they stop a burst if the end of a cache line is reached. Call it a "dynamic burst", because it can be 2, 3 or 4 cycles long, depending on what's most useful.
All this stuff is described in the original Motorola literature. I'd be surprised if Phase 5 has not implemented this, because it's not that hard to do.
Yeah I have the moto 020 and 030 user manuals. I was using an aligned copy which is why I found it odd. A sequential memory copy with data burst off is considerably faster than without on those old cards.