Originally Posted by frank_b
Go to the xmos website and read the literature on the chip. No FPU, very limited memory, low clock speed. Even with the number of threads available on the chip the host CPU will be far faster and have the benefit of being much simpler to code for. I think any special purpose hardware has to be capable of performing some task more efficiently than the host CPU. I think even a single core 1.6 ghz PPC will smoke it. People seem to be in a froth fantasising what they can do with an awesome 400 mips! Go and read Dave Haynie's comment on Amiga world.net.
I spent a few minutes at the XMOS web site. The XMOS cores aren't going to be breaking any benchmark records, BUT, they seem ideally suited (low latency state machines and interrupt servicing) to offloading mundane and esoteric tasks from the system CPU, which is exactly what differentiated the Amiga from other systems of the time.
Also, mentioned earlier in the thread about latencies, not all architectures suffer from huge interrupt latencies; for instance, the PIC32MX microcontrollers have an entire shadow register set available for interrupts, meaning that there is none of the typical processor state save/load overhead.