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Old 19 December 2009, 16:33   #363
Total Chaos forever!

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Join Date: Aug 2007
Location: Ft. Collins, CO USA
Age: 42
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Originally Posted by RedskullDC View Post
Hi Samurai_Crow, et al.

If you look closely at the latest pics, that is exactly what they have done

The 2 TSOP "ISSI" chips on the '060 board are RAMS of some kind.

Bit hard to tell on the baseboard (due to lores pics) but a couple of the BGA chips look like rams of some kind.

Makes sense for the baseboard to present a 14MHz (or 28 perhaps) synchronous bus, in the same way the 1200 does.
CPU card synchronises as required, but runs it's own ram at whatever speed it likes.
Same as virtually every accellerator card already out there for the Amiga (A3630/3640 two exceptions that come to mind).
Those SRAMs on the '060 board are for debugging/software caching/local store purposes. What I meant was to have the DDR2 DRAMs on the CPU daughterboard.

Also, another goal of the Natami is to have a version of the core to work without any CPU daugterboard plugged in. That is their idea of cost-cutting, I think, which is why they have a CPLD as well as an FPGA on the baseboard. That's why they are working on the 68050 core to clock at an estimated 133 MHz.

BTW, the sync-zorro slot probably will clock a bit faster than 14MHz. I don't know what bus-speed they're looking at but to support a 200 MHz FPGA and an overclocked 99 MHz '060 CPU daughterboard they're going to need a faster bus speed. Their aim is for capability rather than backward compatibility.


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