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Old 20 June 2008, 19:45   #131
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Originally Posted by Madcrow View Post
Of course an Altera Hardcopy is just an FPGA for which the ability to flash in new functionality has been permanently removed, so while it IS cheaper than a nomal FPGA, it doesn't perform much better (or any better at all)
FPGA hardening can result in a faster design, but you do not rely on it. Usually you've created your FPGA design with speed bridges and fifos to take into account the performance problems of the FPGA. Taking them out would introduce a risk.

Originally Posted by HenryCase View Post
HardCopy IV ASICs can provide up to twice the core logic performance over the FPGA prototype device.
Marketing bull.

But if you are prepared to take the risk (or you have a relatively flat synchronous design with few clocks and no speed bridges) then yes, you can get better clock rates from a hardened FPGA.

Last edited by alexh; 20 June 2008 at 20:01.
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