Originally Posted by RedskullDC
There is a similar such project for the Atari-ST at:
which has the 68000 in the FPGA aswell. The 68k is still a bit preliminary, but it is coming along.
It is all a mixture of behavioural code and RTL. Takes no account of the timing of instructions or how a CISC uCode CPU really works. It has no real chance in it's current form of working well with a real Amiga let alone an Atari where cycle accurate everything is a MUST.
I wish the author all the best though, he is the only one taking the time and effort to do anything.