Re:bus speed on C64
The C64 was hobbled by the fact that all 4 MHz of the CMOS memory bandwidth was used up by 1MHz 6510 CPU fetches, 1 MHz external ALU (effectively doubling the CPU performance), 1 MHz VIC2 video fetching and 1 MHz character generator shape fetching. The PLA chip that divvied up the bus cycles had to run at the full 4 MHz to keep up with the round-robin bus accesses, causing it to be the first chip to burn up.
My regret about it was that there was no good way to page or burst fetch on it so it couldn't be improved much without 1) breaking compatibility like the C16 and Plus4 or 2) adding expensive additional chips like the 128 did.
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