English Amiga Board - View Single Post - 68030, 68040 and 68060 MMU support (really!)

Toni Wilen · 19 February 2019, 12:36

Thanks.

So it is only generated if data write fault.

This makes sense (except documentation talking about short instruction faults..), if instruction does write at the end, PC has already been increased to beginning of next instruction which means this write happens in instruction boundary = A frame is possible.

But why does A-frame have fields for instruction pipeline stages? Perhaps it is only used internally (CPU can restore already partially decoded instruction state) and for some reason they were documented. Stack frames in register file shows following instruction's opcodes in stack frame dump. But fortunately instruction pipeline stage bits are always zero

EDIT: "Last data write" A-frames seems to work, even Amix still boots.

19 February 2019, 12:36	#263
Toni Wilen WinUAE developer Join Date: Aug 2001 Location: Hämeenlinna/Finland Age: 49 Posts: 26,540	Thanks. So it is only generated if data write fault. This makes sense (except documentation talking about short instruction faults..), if instruction does write at the end, PC has already been increased to beginning of next instruction which means this write happens in instruction boundary = A frame is possible. But why does A-frame have fields for instruction pipeline stages? Perhaps it is only used internally (CPU can restore already partially decoded instruction state) and for some reason they were documented. Stack frames in register file shows following instruction's opcodes in stack frame dump. But fortunately instruction pipeline stage bits are always zero EDIT: "Last data write" A-frames seems to work, even Amix still boots. Last edited by Toni Wilen; 20 February 2019 at 20:16.