Quote:
Originally Posted by pipper
@bebbo: do you know if (and how good) the optimizer knows how to optimize for 060? I.e. shift instructions around to make use of dual-issue?
Also do -m68020-60 and -m68060 avoid instructions that were removed from the 060?
Thanks!
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There are insns which are not used if code is generated for 68060. Some mulu/muls and some fpu insns - no idea if it's sufficient^^
And there is no insn reordering for m68k* in gcc6.