Yes, I did check those examples and they do work. I am using vbcc. However why the simple printf call doesn't work?
My make file looks as follows (exactly as the one in the link):
Code:
CC=vc
LDFLAGS=-nostdlib
HELLO_EXE=hello
HELLO_OBJS=hello.o
all: $(HELLO_EXE)
$(HELLO_EXE) : $(HELLO_OBJS)
$(CC) $(LDFLAGS) -nostdlib -o $(HELLO_EXE) $(HELLO_OBJS)
%.o : %.c
$(CC) -c -o $@ $<
That said running vc or gcc or vbcc from Shell returns Unknown command.
Quote:
Originally Posted by emufan
I guess more info is needed. which compiler are you using?
maybe attach the makefile
#1) with just this small source code, you may build it without a makefile:
Code:
gcc hello.c -o hello.exe
that's easier than updating the Makefile with any new source file.
#2) if you are using vbcc, here are some examples
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