Quote:
Originally Posted by talybont
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I have looked into this a fair bit actually. It is a reference for he Gayle design as I also want to add IDE, however the bus arbitration between the 020 and 000 are different. In my case I am using the same processor. The concept is the same nevertheless; Amiga cycles are slowed (with DTACK) and synchronized with E however local CPU cycles and FastRAM (asynchronous) are fast.