I'm new here so go easy, especially if my questions have been asked heaps of times. I have searched but come up empty handed with solid info.
Some time back (like 10 years ago) I sourced a bunch of 68000HC12 16MHz DIP64 CPUs, ALTERA / XILINX CPLD and some reasonably fast SRAMs (DRAM or alike is not in my project scope). I'm sure you can see where I am going with this!
Anyway, I have bundled together some Verilog to Autoconfig FastRAM (easy part) but I am battling with the CPU side of the design. Anyone know of an open design (sure I can buy one, but it is so much more rewarding to built it) or who's brain I can pick?!?
Thanks!