Hello Everyone!
I'm the creator of the "FleaFPGA Ohm" board mentioned in this thread.
Just wanted to introduce myself and mention a few recent tweaks added to the Minimig ECS core ported to my board:
Very recently, I found robinsonb5's github repo and decided to try adding another 16MB expanded ram and also the CPU cache to what was ported previously. Here's the
sysinfo result. Sysinfo also now reports an extra 16MB of 32-bit RAM as well.
Also tried WHDLoad (18.3) for the first time ever on my Minimig (had been using .ADF and .HDF files previously) and that seems to work for the dozen-or-so game demos I've had the time to try. I do plan on putting the tweaked HDL sources up on my github page soon.
Well that's all for now. If anyone has questions about my Ohm project, feel free to ask. Thanks!
Regards,
Valentin Angelovski