Quote:
Originally Posted by matthey
There is a limited "forward into the future" with the Apollo Core. The tracks end with a FPGA CPU hyper-optimized for low end FPGAs. The ISA limits the future to the past. The SIMD unit with shared integer and SIMD registers makes no sense to widen to modern SIMD widths or add floating point like modern SIMDs (MMX is practically stuck with ancient integer only 64 bits). CPU feature identification is as primitive as '90s CPUs. No other 68k (FPGA) CPU is likely to support Apollo Core enhancements (no attempt to make open standards). The ISA enhancements are the creation of one man which I expect most teams of peers would disagree with.
|
How does this translate into the merits of the original poster's question(s)?