View Single Post
Old 29 June 2017, 23:03   #56
Registered User

Join Date: Nov 2016
Location: Vermont - USA
Posts: 44
Exactly that, the Apollo core has a long term goal that will hopefully lead to a true ASIC that could be clocked at a much higher clock speed. The Vampire which is handled by Majsta and Kipper just happen to use some portions of that core, what can be fit into the current FPGA (cyclone III). Gunnar is working on things that may not fit on the current Vampire boards, also nothing is stopping another company to use his core for other projects.
TrashyMG is offline  
Page generated in 0.03898 seconds with 10 queries