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Old 21 June 2017, 22:24   #153
grond
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Join Date: Jun 2015
Location: Germany
Posts: 364
Quote:
Originally Posted by matthey View Post
No! Wrong! The POWER8 shares the FPU and SIMD unit register files (vector scalar register file).

https://www.researchgate.net/publica...r_architecture

See Figure 1 which clearly shows the vector scalar register file which is 128x64 bits. What is the "reality" here?
"The VSU features a large number of new instructions and
architectural refinements for applications like business
analytics, big data, string processing, and security. The VSX pipelines now supports 2-way 64-bit vector and 128-bit scalar integer data types and new direct GPR-to/from-VSR move operations that provide a fixed-latency and high bandwidth data exchange between the vector and general purpose registers. The added VMX crypto instruction set is targeted towards AES, SHA2 and CRC computations and several instructions have been promoted into VSX to gain access to all 64 architected vector registers."

The VSX supports both scalar and vector instructions for both floating-point and integer, all happily mixed into a single register file.
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