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Originally Posted by idrougge
What I was wondering was how the 8 MHz clock mapped to the picture generation. The Amiga's 7.xx clock maps directly to the PAL/NTSC colour clock
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Ah, I misunderstood your question then. Though it seems to have been answered by now.
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Originally Posted by kovacm
So MC68000 in ST can always access RAM in "full speed" (only non-4 cycle instruction will cause delay/waste cycles) and it is almost 4MB/s in practice.
What about Amiga 500 and chip RAM? MC68000 also can read/write 4MB/s if there is no contention from custom chips on bus/ram? Is speed also 4MB/s?
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Atari ST memory speed should be somewhere near 4MB/s for reading or writing (though in practice the CPU will never reach that because of instruction decoding & looping requirements). Don't forget that any figures are only one-way, so a copy is half speed and a 'soft sprite' operation will be at most 1/4 of this.
Amiga memory speed is more complicated. Up to 4 bitplanes in lowres / 2 bitplanes in hires the CPU is, like the Atari, not slowed down (except on non-4 cycle multiples instructions). Since its clock speed is ~7MHz, the speed is then somewhere near 3.5MB/s.
When more bitplanes are used, memory speed goes down (5 BPL=75% speed, 6 BPL = 50%, hires 3 BPL = 50%, hires 4 BPL = 0%), but only during the time bitplane DMA is used. So a 5 BPL 320x256 scrolling screen has the CPU running at ~75% speed of each visible scan line and at 100% for the remainder, or roughly 80% overall.
Memory speed for the CPU is further impacted by Audio, Disk, Copper, Sprite and Blitter DMA. Which I haven't included for clarity.
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And what is speed of (real) FAST RAM in Amiga 500?
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Fast RAM on an A500 always runs at full speed for the CPU, or ~3.5MB/s regardless of any custom chip usage. Note that this is more of a gain than might be thought, clever programming can keep the Blitter/Copper/etc busy while doing stuff with the CPU in Fast RAM. This can improve performance by quite a bit.
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hm... Shifter in ST do not even use available 4MB/s but rather around 2MB/s for 32KB screen (320x200 in 16 color, 60Hz; and somewhere more for 640x400 mono @71Hz on SM124) - rest of available memory cycle is used for memory refreshing. Someone claim that Atari use RAM outside manufacture specification to achieve this speed (4MB/s for CPU and 4MB/s for Shifter) so this additional refreshing cycles are necessary because of this.
But, what prohibit in ST design to have e.g. 32colors (5 bitplanes)? There is enough bandwidth for this...
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The same that prohibits the Amiga OCS design from having 8 BPL screenmodes: design time decisions.
My guess is that Atari didn't want to spend the time and money needed to create a better graphics chip - the one they had was significantly better than the 8 bit chips and consumer level PC hardware as it was and the Amiga wasn't on the market yet.