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Old 12 March 2017, 14:45   #24
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Join Date: Mar 2017
Location: London
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Originally Posted by matthey View Post
Even a single lane PCIe slot has huge bandwidth compared to any classic Amiga hardware (it is even adequate for most slow AmigaOS 4 hardware sadly). PCIe would still need those SerDes from a more expensive FPGA but that is likely affordable for big box and 1200 accelerators.
Looking at a GTX1070 benchmark via one of these devices shows that at x1 speeds you can still push an awful lot of data through PCI-E a x16 wont be fully maxed out for years yet.

Moving the topic along a bit, I have had a look at this doc from the AMD Developer Guides


Its quite interesting reading from page 18 onwards.

You can either have the CPU push the data into the cards CP(Command Processor) or point it to a memory area and tell it to cycle through(pull) the data until you tell it to stop

You kind of set up a `Copper List` of instructions for it to follow, I wonder where they got that idea?

There is a list of Comand Processor registers from page 147 onwards.

Would a SerDes have access to the memory onboard the Vampire card?
So you could say have an interupt signal in your code that instructs the cards CP to use pull mode and grab a list of instructions from memory then wait until your next interupt
If this is the case, then it is not imposible to get the card to do something.

The programming of the shaders and vertex units looks very complicated and getting a `graphics card driver` up and running would be quite the labour of love.

But if you look at the demo scene, they get a picture and sound out of almost anything you can solder together, program and wire up to an AV system.
Hardware banging the card just to see what happens could be quite fun for the more adventurous programmers out there
It could be 1987 all over again with a new copperlist and blitter registers to figure out!
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